台灣|薪資40000起的高薪工作,共282440筆
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- 面議(經常性薪資達4萬元或以上)
- 2年工作經驗
公司名稱:工作地: 新竹市東區瑞昱半導體股份有限公司
工作內容:工作項目: Support Android TV軟體開發及客戶技術支援。 應徵條件: 1. 碩士以上; 電機工程、資訊工程、資訊科學相關科系畢業為主。 2. 熟悉 JAVA/C/C++/Android. 3. 具2年以上相關工作經驗,曾接觸 embedded system、開發過智慧型手機或多媒體相關產品者為佳。 -
- 面議(經常性薪資達4萬元或以上)
- 2年工作經驗
公司名稱:工作地: 東北亞韓國瑞昱半導體股份有限公司
工作內容:Job Descriptions: IPs of multimdedia SOC include video and audio proceesing, picture quality enhancement, bus arbitration,high frequence IO interface, Video coding protocol, SOC platform, and so on. All IPs with the below tasks, - RTL studying, planning structure, coding, simulation. - Coworking with Design verification team for simulation, verification, coverage. - Using design EDA tools, such as ncverilog, VCS for sim, prime time for STA and power analysis, linting tools and so on. - IC verification and debug. - Discuss the architecture of next chip with SW and Digital IC leaders for next chip. - Co-work with SW designer to solve Customers‘ issues. Job Requirements > Minimum Qualifications - Ability of communicating, reading, and writing by English - Master‘s degree or over in Electrical Engineering, Computer Science, Mathematical or related science & engineering field. Or Bachelor with over 2 years working experience in the field of digital IC design. - Familiar with at least one programming language, such as HDL, C-like, Perl-like and so on. > Preferred Qualifications - Knowing how software works, such as IRQ, limitation, and etc. - Experience of display timing. - Strong processor or SoC architecture knowledge - Microarchitecture implementation - Microprocessor integration - Low power Design - Excellent verbal and written communication skills. Ability to work in a team environment. Good self-direction and time management skills - Develop RTL for multiple logic blocks of a DSP/CPU core - Run various frontend tools to check for linting, clock domain crossing, synthesis, etc. - Work with physical design team on design constrain and timing closure - Work with power team on power optimization - Work with verification team to collaborate on test plan, coverage plan, and coverage closure. Excellent verbal and written communication skills. Ability to work in a team environment. Good self-direction and time management skills - Passion to co-work with tens of partners and to summary information. -
- 月薪27470~52000元
- 1年工作經驗
公司名稱:工作地: 新竹市東區瑞昱半導體股份有限公司
工作內容:工作項目: 1. 執行 system team之工作。 2. 負責 TV certification測試,以及測試一些系統tool、分析效能,幫忙複製問題並進行問題初步整理及分析。 應徵條件: 1. 專科以上; 電機工程、電信工程、電控工程、資訊工程、資訊科學、自動控制等相關科系畢業為主。 2. 具基本程式概念,有編過code、寫過code及1年以上相關經驗者為佳。 -
- 面議(經常性薪資達4萬元或以上)
- 工作經歷不拘
公司名稱: 瑞昱半導體股份有限公司工作地: 新竹市東區工作內容:工作項目: Monitor/translator韌體開發,客戶問題解決。 應徵條件: 1. 碩士以上;電機工程、電信工程、電控工程、電子工程、資訊工程、資訊科學、動力機械、自動控制、通訊工程相關科系畢業為主。 2. 熟悉 C語言, C++。 3. 熟悉 MCU, orcad。 -
- 面議(經常性薪資達4萬元或以上)
- 工作經歷不拘
公司名稱: 瑞昱半導體股份有限公司工作地: 台南市新市區工作內容:工作項目: 1. CPU & GPU Backend Implementation (APR) 2. CPU/GPU Backend Flow Development, Enhancement & Automation 3. Advanced CPU/GPU Technology Development: High-performance, Low Power, and PPA Optimization 應徵條件: 1. 碩士以上;電機、資工、電子相關科系畢業為主。 2. 熟悉 APR Tools (Innovus、ICC2、Fusion Compiler…),有Synthesis、STA/IR Analysis、Physical Verification等相關經驗者佳。 3. 具備程式設計能力,熟悉 TCL/Perl/C++/Python。 4. 有 High Performance CPU/GPU APR經驗尤佳。 5. 積極負責、勇於迎接新挑戰,對於 High-Performance CPU/GPU Technology 有興趣者。 -
- 面議(經常性薪資達4萬元或以上)
- 工作經歷不拘
公司名稱: 瑞昱半導體股份有限公司工作地: 台南市新市區工作內容:工作項目: 1. High-Performance CPU & GPU Frontend Implementation 2. Advanced CPU Technology Development: High-performance, Ultra-low Power, and PPA Optimization 3. Processor Frontend Development Flow Enhancement & Automation 應徵條件: 1. 碩士以上;電機、電機與控制、資訊工程、電子相關科系畢業為主。 2. 熟悉 Verilog RTL Design、SoC Integration & Design Flow、Frontend EDA Tools、Synthesis & STA Methodology、Low Power Design & Verification。 3. 具備 IP Integration、Hierarchical Implementation、Verification 能力;熟悉 TCL/Perl/C++/Python。 4. 英文能力良好,聽說讀寫精通。 5. 有 CPU、GPU、Multi-Core Processor Development 經驗尤佳,例如 Design/Integration/Synthesis/DFT/Timing Closure/Sign-off/Production 等。 6. 積極負責、勇於迎接挑戰,對於 High-Performance CPU/GPU、Advanced PPA Optimization、Energy Efficiency Technology 有興趣者。 -
- 面議(經常性薪資達4萬元或以上)
- 工作經歷不拘
公司名稱: 瑞昱半導體股份有限公司工作地: 台南市新市區工作內容:工作項目: 1. ARM Architecture based Complex CPU Subsystem Platform Design & Integration, Add-on Features Enablement and IP Development 2. SoC Architecture Exploration, Performance Projection and Bottleneck Analysis 3. Benchmark/Power Characterization on Emulation Platform, Result Analysis and Optimization 4. CPU Architecture/Micro-architecture Research 5. Involvement of Post-silicon Bring-up and Debug 應徵條件: 1.碩士以上;電機、資工、電子相關科系畢業為主。 2.具IP開發經驗,熟悉 SoC Integration & Design Flow、Frontend Timing/Power Analysis EDA Tools。 3.熟悉ARMv7/v8-A CPU 架構及AMBA protocol,有 ARM Cortex-A CPU/Subsystem Design/Integration/PPA Optimization/Sign-off 經驗尤佳。 4.具Emulation platform (Zebu, Palladium)經驗尤佳。 5.有 Low Power Design & Verification、Post-Silicon Validation & Debug 經驗尤佳。 6.積極負責、溝通協調能力強、勇於迎接挑戰,對於 High-Performance CPU Technology 有興趣者。